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Version Date Modified Size Author Changes ... Change note
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At line 80 added one line
!! SECURITY
At line 82 added 114 lines
Numerous tests are made within the assembler for user errors:
# All parameters used in CODE definitions must be removed.
# Conditionals must be properly nested and paired.
# Address modes and operands must be allowable for the op-codes
These tests are accomplished by checking the stack position (in CSP) at the creation of the definition name and comparing it with the position at END-CODE. Legality of address modes and operands is insured by means of a bit mask associated with each operand.
Remember that if an error occurs during assembly, END-CODE never executes. The result is that the "smudged" condition of the definition name remains in the "smudged" condition and will not be found during dictionary searches.
The user should be aware that one error not trapped is referencing a definition in the wrong vocabulary:
i.e., {{{0=}}} of ASSEMRLER when you want {{{0=}}} of FORTH
(Editor's note: the listing assumes that the figFORTH error messages are already available in the system, as follows:
?CSP issues the error message "DEFINITION NOT FINISHED" if the stack position differs from the value saved in the user variable CSP, which is set at the creation of the definition name.
?PAIRS issues the error message "CONDITIONALS NOT IMPAIRED" if its two arguments do not match.
3 ERROR prints the error message "HAS INCORRECT ADDRESS MODE".)
!!SUMMARY
The object code of our example is:
{{{
3059 83 4D 4F CE CODE MON
305D 4D 30 link field
305F 61 30 code field
3061 00 BRK
3062 4C 42 02 JMP NEXT
}}}
!!OP-CODES, revisited
The bulk of the assembler consists of dictionary entries for each op-code. 6502 one mode op-codes are:
BRK,
CLC,
CLD,
CLI,
CLV,
DEX,
DEY,
INX,
INY,
NOP,
PHA,
PHP,
PLA,
PLP,
RTI,
RTS,
SEC,
SED,
SEI,
TAX,
TAY,
TSX,
TXS,
TXA,
TYA,
When any of these are executed, the corresponding op-code byte is assembled into the dictionary.
The multi-mode op-codes are:
ADC,
AND,
CMP,
EOR,
LDA,
ORA,
SBC,
STA,
ASL,
DEC,
INC,
LSR,
ROL,
ROR,
STX,
CPX,
CPY,
LDX,
LDY,
STY,
JSR,
JMP,
BIT,
These usually take an operand, which must already be on the stack. An address mode may also be specified. If non is given, the op-code uses z-page or absolute addressing. The address modes are determined by:
|| Symbol || Mode || Operand
| .A | accumulator | none
| # | immediate | 8 bits only
| ,X | indexed X | z-page or absolute
| ,Y | indexed Y | z-page or absolute
| X) | indexed indirect X | z-page only
| )Y | indirect index Y | z-page only
| ) | indirect | absolute only
| one | memory | z-page or absolute
!! EXAMPLES
Here are examples of Forth vs. conventional assembler. Note that the operand comes first, followed by any mode modifier, and then the op-code mnemonic. This makes best use of the stack at assembly time. Also, each assembler word is set off by blanks, as is required for all Forth source text.
{{{
.A ROL, --> ROL A
1 # LDY, --> LDY #1
DATA ,X STA, --> STA DATA,X
DATA ,Y CMP, --> CMP DATA,Y
6 X) ADC, --> ADC (06,X)
POINT )Y STA, --> STA (POINT),Y
VECTOR ) JMP, --> JMP (VECTOR)
}}}