||Read/Write||ADR||HEXADR||NAME||Description||OS
|Read|53768|$D208|ALLPOT|Audio control|all
|Write|53768|$D208|AUDCTL|Pot Port State|all

!!!AUDCTL (Write)
to be done

!!!ALLPOT (Read)
||Bit||Paddle
|0|Paddle 0, [PADDL0], [POT0]
|1|Paddle 1, [PADDL1], [POT1]
|2|Paddle 2, [PADDL2], [POT2]
|3|Paddle 3, [PADDL3], [POT3]
|4|Paddle 4, [PADDL4], [POT4]
|5|Paddle 5, [PADDL5], [POT5]
|6|Paddle 6, [PADDL6], [POT6]
|7|Paddle 7, [PADDL7], [POT7]
If a bit is set to zero, then the register value for that pot is valid (it's in use); if it is one, then the value is not valid.

----
see also: [Controller topics|Controller_topics], [POTGO], [ALLPOT]

previous: [AUDC4],[POT7]

next: [STIMER]