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This page (revision-5) was last changed on 22-Mar-2017 00:07 by Florian Dingler  

This page was created on 11-Oct-2015 22:30 by Florian Dingler

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Difference between version and

At line 14 changed one line
To define the data direction of PORT A, set Bit 2 of PACTL to 0.
To define the data direction of PORT A, set Bit 2 of [PACTL] to 0. Then write a byte to [PORTA], where Bits set to 1 indicate WRITE and Bits set to 0 indicate READ. Normally [PORTA] set to %00000000 (=all input).
At line 16 removed 4 lines
Then write a byte to [PORTA], where Bits set to 1 indicate WRITE and Bits set to 0 indicate READ.
Normally set to %00000000 (=all input).
Version Date Modified Size Author Changes ... Change note
5 22-Mar-2017 00:07 0.737 kB Florian Dingler to previous
4 22-Mar-2017 00:06 0.735 kB Florian Dingler to previous | to last
3 10-Mar-2017 22:03 0.697 kB Florian Dingler to previous | to last
2 11-Oct-2015 22:34 0.689 kB Florian Dingler to previous | to last
1 11-Oct-2015 22:30 0.684 kB Florian Dingler to last
« This page (revision-5) was last changed on 22-Mar-2017 00:07 by Florian Dingler  
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