This page (revision-8) was last changed on 11-Apr-2023 13:20 by matosimi 

This page was created on 09-Sep-2015 16:06 by Florian Dingler

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Page revision history

Version Date Modified Size Author Changes ... Change note
8 11-Apr-2023 13:20 3 KB matosimi to previous
7 11-Apr-2023 11:37 2 KB matosimi to previous | to last
6 03-Feb-2023 15:21 2 KB Florian Dingler to previous | to last
5 21-Mar-2017 23:08 2 KB Florian Dingler to previous | to last
4 02-Nov-2015 19:58 2 KB Florian Dingler to previous | to last
3 11-Oct-2015 20:20 2 KB Florian Dingler to previous | to last
2 09-Sep-2015 16:08 1 KB Florian Dingler to previous | to last
1 09-Sep-2015 16:06 1 KB Florian Dingler to last

Page References

Incoming links Outgoing links
PORTB
PORTB

Version management

Difference between version and

At line 1 added one line
!!!For 400, 800 (OS A)
At line 2 changed one line
|54017|$D301|PORTB| | [STICK2] [STICK3] [PTRIG4] [PTRIG5] [PTRIG6] [PTRIG7]| all
|54017|$D301|PORTB| | [STICK2] [STICK3] [PTRIG4] [PTRIG5] [PTRIG6] [PTRIG7]| 400/800
At line 4 changed one line
Read or write data from the control ports (joystick ports), depending on how the data direction is set (default: 0 "read/input"). To set the direction, set Bit 2 of [PACTL] to "0" and define the direction by setting the bits of PORTA (0=read, 1=write) for each input/output line. Then set Bit 2 of [PACTL] to "1" again.
Read or write data from the control ports (joystick ports), depending on how the data direction is set (default: 0 "read/input"). To set the direction, set Bit 2 of [PBCTL] to "0" and define the direction by setting the bits of PORTB (0=read, 1=write) for each input/output line. Then set Bit 2 of [PBCTL] to "1" again.
At line 14 changed 8 lines
|7|PA7|Joystick Port 2 Pin 4|Right|Paddle 4 [PTRIG3]
|6|PA6|Joystick Port 2 Pin 3|Left|Paddle 3 [PTRIG2]
|5|PA5|Joystick Port 2 Pin 2|Down|not used
|4|PA4|Joystick Port 2 Pin 1|Up |not used
|3|PA3|Joystick Port 1 Pin 4|Right|Paddle 2 [PTRIG1]
|2|PA2|Joystick Port 1 Pin 3|Left|Paddle 1 [PTRIG0]
|1|PA1|Joystick Port 1 Pin 2|Down|not used
|0|PA0|Joystick Port 1 Pin 1|Up|not used
|7|PA7|Joystick Port 4 Pin 4|Right|Paddle 8 [PTRIG7]
|6|PA6|Joystick Port 4 Pin 3|Left|Paddle 7 [PTRIG6]
|5|PA5|Joystick Port 4 Pin 2|Down|not used
|4|PA4|Joystick Port 4 Pin 1|Up |not used
|3|PA3|Joystick Port 3 Pin 4|Right|Paddle 6 [PTRIG5]
|2|PA2|Joystick Port 3 Pin 3|Left|Paddle 5 [PTRIG4]
|1|PA1|Joystick Port 3 Pin 2|Down|not used
|0|PA0|Joystick Port 3 Pin 1|Up|not used
At line 23 changed one line
Joystick direction Bit=0 when pushed in that direction
Joystick direction sets Bit=0 when pushed in that direction
At line 27 added 69 lines
!!!For 600XL, 800XL, 1200XL
||ADR||HEXADR||NAME||Description||OS
|54017|$D301|PORTB| Memory Management | XL/XE
1200XL
||Bit||Function||Description
|7|$5000-$57FF|0=Self test, 1=RAM
|6|not used|
|5|not used|
|4|not used|
|3|LED2|0=off, 1=on
|2|LED1|0=off, 1=on
|1|not used
|0|$C000-$FFFF|0=RAM, 1=OS-ROM
600XL/800XL
||Bit||Function||Description
|7|$5000-$57FF|0=Self test, 1=RAM
|6|not used|
|5|not used|
|4|not used|
|3|not used|
|2|not used|
|1|$A000-$BFFF|0=ATARI BASIC ROM, 1=RAM
|0|$C000-$FFFF|0=RAM, 1=OS-ROM
!!!For 130XE
Bits 2,3,4,5 set the behavior of extended RAM which is always mapped to $4000-$7FFF area.
||Bit||Function||Description
|7|$5000-$57FF|0=Self test, 1=RAM
|6|not used|
|5|ANTIC|0=ANTIC has access to extended RAM, 1=ANTIC has access to main RAM
|4|CPU|0=CPU has access to extended RAM, 1=CPU has access to main RAM
|3|$4000-$7FFF|Bank selection bit
|2|$4000-$7FFF|Bank selection bit
|1|$A000-$BFFF|0=ATARI BASIC ROM, 1=RAM
|0|$C000-$FFFF|0=RAM, 1=OS-ROM
Compatibility mode (only main bank enabled)
||Bit 5 ||Bit 4 ||Bit 3 ||Bit 2 ||CPU accesses ||ANTIC accesses
|VBE |CPE |Bank selection|Bank selection| |
|1 |1 |doesn't matter|doesn't matter|M $4000-$7FFF| M $4000-$7FFF
CPU extended RAM mode
||Bit 5 ||Bit 4 ||Bit 3 ||Bit 2 ||CPU accesses ||ANTIC accesses
|VBE |CPE |Bank selection |Bank selection| |
|1 |0 |0 |0 |E $0000-$3FFF |M $4000-$7FFF
|1 |0 |0 |1 |E $4000-$7FFF |M $4000-$7FFF
|1 |0 |1 |0 |E $8000-$BFFF |M $4000-$7FFF
|1 |0 |1 |1 |E $C000-$FFFF |M $4000-$7FFF
Video (ANTIC) extended RAM mode
||Bit 5 ||Bit 4 ||Bit 3 ||Bit 2 ||CPU accesses ||ANTIC accesses
|VBE |CPE |Bank selection|Bank selection| |
|0 |1 |0 |0 |M $4000-$7FFF |E $0000-$3FFF
|0 |1 |0 |1 |M $4000-$7FFF |E $4000-$7FFF
|0 |1 |1 |0 |M $4000-$7FFF |E $8000-$BFFF
|0 |1 |1 |1 |M $4000-$7FFF |E $C000-$FFFF
General extended RAM Mode
||Bit 5 ||Bit 4 ||Bit 3 ||Bit 2 ||CPU accesses ||ANTIC accesses
|VBE |CPE |Bank selection|Bank selection| |
|0 |0 |0 |0 |E $0000-$3FFF |E $0000-$3FFF
|0 |0 |0 |1 |E $4000-$7FFF |E $4000-$7FFF
|0 |0 |1 |0 |E $8000-$BFFF |E $8000-$BFFF
|0 |0 |1 |1 |E $C000-$FFFF |E $C000-$FFFF
At line 98 added 4 lines
previous: [PORTA]
next: [PACTL]
This page (revision-8) was last changed on 11-Apr-2023 13:20 by matosimi  Top